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Final Electrical Specifications
FEATURES
s s s s s s s s s s
LT1881/LT1882 Dual and Quad Rail-to-Rail Output, Picoamp Input Precision Op Amps April 2000 DESCRIPTIO
The LT(R)1881 and LT1882 op amps bring high accuracy input performance to amplifiers with rail-to-rail output swing. Input bias currents and capacitive load driving capabilities are superior to the similar LT1884 and LT1885 amplifiers, at the cost of a slight loss in speed. Input offset voltage is trimmed to less than 50V and the low drift maintains this accuracy over the operating temperature range. Input bias currents are an ultralow 200pA maximum. The amplifiers work on any total power supply voltage between 2.7V and 36V (fully specified from 5V to 15V). Output voltage swings to within 40mV of the negative supply and 220mV of the positive supply make these amplifiers good choices for low voltage single supply operation. Capacitive loads up to 1000pF can be driven directly in unity-gain follower applications. The dual LT1881 and LT1881A are available with standard pinouts in S8 and PDIP packages. The quad LT1882 is in a 14-pin SO package. For a higher speed device with similar DC specifications, see the LT1884/LT1885.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Offset Voltage: 50V Maximum (LT1881A) Input Bias Current: 200pA Maximum (LT1881A) Offset Voltage Drift: 0.8V/C Maximum Rail-to-Rail Output Swing Supply Range: 2.7V to 36V Operates with Single or Split Supplies Open-Loop Voltage Gain: 1 Million Minimum 1mA Maximum Supply Current Per Amplifier Stable at AV = 1, CL = 1000pF Standard Pinouts
APPLICATIO S
s s s s s
Thermocouple Amplifiers Bridge Transducer Conditioners Instrumentation Amplifiers Battery-Powered Systems Photo Current Amplifiers
TYPICAL APPLICATIO
5V
16-Bit Voltage Output DAC on 5V Supply
26 24 22 20 18 16 14 12 10 8 6 4 2 0 VS = 15V
TC VOS Distribution, Industrial Grade
5V
+
LT1881
-
LT1634 4.096V R1 -5V
RCOM
REF
ROFS 33pF 5V DAC
PERCENT OF UNITS (%)
1.65k
40 N8 (1 LOT) 144 S8 (2 LOTS) 184 TOTAL PARTS
-
LT1881
1 -0.9-0.8-0.7-0.6-0.5-0.4-0.3-0.2-0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 INPUT OFFSET VOLTAGE DRIFT (V/C)
1881/2 TA01a
LTC(R)1597
+
-5V
VOUT - 4.096V TO 4.096V
1881/2 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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U
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1
LT1881/LT1882
ABSOLUTE
AXI U RATI GS
Supply Voltage (V + to V -) ....................................... 40V Differential Input Voltage (Note 2) ......................... 10V Input Voltage .................................................... V + to V - Input Current (Note 2) ........................................ 10mA Output Short-Circuit Duration (Note 3) ............ Indefinite
PACKAGE/ORDER I FOR ATIO
TOP VIEW OUT A 1 -IN A 2 +IN A 3 V- 4 N8 PACKAGE 8-LEAD PDIP A B 8 7 6 5 V+ OUT B -IN B +IN B
ORDER PART NUMBER LT1881CN8 LT1881IN8 LT1881CS8 LT1881IS8 LT1881ACN8 LT1881AIN8 LT1881ACS8 LT1881AIS8 S8 PART MARKING 1881 1881I 1881A 1881AI
OUT A 1 -IN A 2 +IN A 3 V+ 4 +IN B 5 -IN B 6 OUT B 7
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 150C, JA = 130C/W (N8) TJMAX = 150C, JA = 190C/W (S8)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5)
SYMBOL VOS PARAMETER Input Offset Voltage (LT1881A) 0C < TA < 70C - 40C < TA < 85C Input Offset Voltage (LT1881/LT1882) 0C < TA < 70C - 40C < TA < 85C Input Offset Voltage Drift (Note 6) IOS Input Offset Current (LT1881A) 0C < TA < 70C - 40C < TA < 85C Input Offset Current (LT1881/LT1882) 0C < TA < 70C - 40C < TA < 85C
q q q q q q q q q q
CONDITIONS
0C < TA < 70C - 40C < TA < 85C
2
U
U
W
WW U
W
(Note 1)
Operating Temperature Range (Note 4) .. - 40C to 85C Specified Temperature Range (Note 5) ... - 40C to 85C Maximum Junction Temperature .......................... 150C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
TOP VIEW 14 OUT D A D 13 -IN D 12 +IN D 11 V - B D 10 +IN C 9 8 -IN C OUT C
ORDER PART NUMBER LT1882CS LT1882IS
S PACKAGE 14-LEAD PLASTIC SO TJMAX = 150C, JA = 150C/W
MIN
TYP 25
MAX 50 85 110 80 125 150 0.8 0.8 200 250 300 500 600 700
UNITS V V V V V V V/C V/C pA pA pA pA pA pA
30
0.3 0.3 100
150
LT1881/LT1882
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5)
SYMBOL IB PARAMETER Input Bias Current (LT1881A) 0C < TA < 70C - 40C < TA < 85C Input Bias Current (LT1881/LT1882) 0C < TA < 70C - 40C < TA < 85C Input Noise Voltage en in VCM CMRR PSRR AVOL Input Noise Voltage Density Input Noise Current Density Input Voltage Range
q q q q q
CONDITIONS
MIN
TYP 100
MAX 200 250 300 500 600 700
UNITS pA pA pA pA pA pA VP-P nV/Hz pA/Hz
150
0.1Hz to 10Hz f = 1kHz f = 1kHz VEE + 1.0 VEE + 1.2 106 104 106 500 350 300 250 250 200
0.5 14 0.03 VCC - 1.0 VCC - 1.2 128 132 2.4 1600 800 400 20 25 70 270 120 130 180 360 0.45
q
V V dB dB dB
Common Mode Rejection Ratio Power Supply Rejection Ratio Minimum Operating Supply Voltage Large-Signal Voltage Gain
1V < VCM < 4V 1.2V < VCM < 3.8V VEE = 0, VCM = 1.5V; 2.7V < VCC < 32V RL = 10k; 1V < VOUT < 4V
q q q q
2.7
V V/mV V/mV V/mV V/mV V/mV V/mV
RL = 2k; 1V < VOUT < 4V
q
RL = 1k; 1V < VOUT < 4V
q
VOL
Output Voltage Swing Low
No Load ISINK = 100A ISINK = 1mA ISINK = 5mA No Load ISOURCE = 100A ISOURCE = 1mA ISOURCE = 5mA VCC = 3V VCC = 5V
q q q q q q q q
40 50 150 600 220 230 300 600 0.85 1.2 0.9 1.4 1.0 1.5
mV mV mV mV mV mV mV mV mA mA mA mA mA mA mA mA MHz s V/s V/s V/s V/s
VOH
Output Voltage Swing High (Referred to VCC)
IS
Supply Current Per Amplifier
0.65 0.65 0.70 30 30 1.0 30
0.5
q
VCC = 12V
q
0.5
q q
ISC GBW tS SR + SR -
Short-Circuit Current Gain-Bandwidth Product Settling Time Slew Rate Positive Slew Rate Negative
VOUT Short to GND VOUT Short to VCC f = 20kHz 0.01%, VOUT = 1.5V to 3.5V, AV = -1, RL = 2k AV = - 1
15 15 0.5
q
0.15 0.12 0.11 0.08
0.35 0.18
AV = - 1
q
3
LT1881/LT1882
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Single supply operation VEE = 0, VCC = 5V; VCM = VCC/2 unless otherwise noted. (Note 5)
SYMBOL VOS PARAMETER Offset Voltage Match (LT1881A) CONDITIONS (Note 7) 0C < TA < 70C - 40C < TA < 85C (Note 7) 0C < TA < 70C - 40C < TA < 85C (Notes 6, 7) (Notes 7, 8) 0C < TA < 70C - 40C < TA < 85C (Notes 7, 8) 0C < TA < 70C - 40C < TA < 85C (Notes 7, 9) VEE = 0V, VCM = 1.5V, 2.7V < VCC < 32V, (Notes 7, 9)
q q
ELECTRICAL CHARACTERISTICS
MIN
TYP 30
MAX 70 125 160 125 175 235 1.2 300 400 500 700 900 1000
UNITS V V V V V V V/C pA pA pA pA pA pA dB dB
Offset Voltage Match (LT1881/LT1882)
35
q q q q q
Offset Voltage Match Drift IB+ Noninverting Bias Current Match (LT1881A) Noninverting Bias Current Match (LT1881/LT1882) CMRR PSRR Common Mode Rejection Match Power Supply Rejection Match
0.4 200
250
q q q q
102 104
125 126
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Split supply operation VS = 15V, VCM = 0V unless otherwise noted. (Note 5)
SYMBOL VOS PARAMETER Input Offset Voltage (LT1881A) 0C < TA < 70C - 40C < TA < 85C Input Offset Voltage (LT1881/LT1882) 0C < TA < 70C - 40C < TA < 85C Input Offset Voltage Drift (Note 6) IOS Input Offset Current (LT1881A) 0C < TA < 70C - 40C < TA < 85C Input Offset Current (LT1881/LT1882) 0C < TA < 70C - 40C < TA < 85C IB Input Bias Current (LT1881A) 0C < TA < 70C - 40C < TA < 85C Input Bias Current (LT1881/LT1882) 0C < TA < 70C - 40C < TA < 85C Input Noise Voltage en in VCM Input Noise Voltage Density Input Noise Current Density Input Voltage Range
q q q q q q q q q q q q q q q
CONDITIONS
MIN
TYP 25
MAX 50 85 110 80 125 150 0.8 0.8 200 250 300 500 600 700 200 250 300 500 600 700
UNITS V V V V V V V/C V/C pA pA pA pA pA pA pA pA pA pA pA pA VP-P nV/Hz pA/Hz
30
0C < TA < 70C - 40C < TA < 85C
0.3 0.3 150
150
150
150
0.1Hz to 10Hz f = 1kHz f = 1kHz VEE + 1.0 VEE + 1.2
0.5 14 0.03 VCC - 1.0 VCC - 1.2
V V
4
LT1881/LT1882
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Split supply operation VS = 15V, VCM = 0V unless otherwise noted. (Note 5)
SYMBOL CMRR +PSRR -PSRR AVOL PARAMETER Common Mode Rejection Ratio Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Minimum Operating Supply Voltage Large-Signal Voltage Gain RL = 10k; -13.5V < VOUT < 13.5V
q
CONDITIONS -13.5V < VCM < 13.5V VEE = -15, VCM = 0; 1.5V < VCC < 18V VCC = 15, VCM = 0; -1.5V < VEE < -18V
q q q q
MIN 114 110 106 1000 700 175 125 90 65
TYP 130 132 132 1.2 1600 420 230 20 25 70 270 160 160 180 360
MAX
UNITS dB dB dB
1.35
V V/mV V/mV V/mV V/mV V/mV V/mV
RL = 2k; -13.5V < VOUT < 13.5V
q
RL = 1k; -12V < VOUT < 12V
q
VOL
Output Voltage Swing Low (Referred to VEE)
No Load ISINK = 100A ISINK = 1mA ISINK = 5mA No Load ISOURCE = 100A ISOURCE = 1mA ISOURCE = 5mA VS = 15V
q q q q q q q q
40 50 150 600 220 230 300 600 1.1 1.6
mV mV mV mV mV mV mV mV mA mA mA mA mA mA MHz s V/s V/s V/s V/s
VOH
Output Voltage Swing High (Referred to VCC)
IS ISC
Supply Current Per Amplifier Short-Circuit Current
0.5
q
0.85 40 40 30 30 1.1 35
VOUT Short to VEE
q
20 15 20 15 0.6
VOUT Short to VCC
q
GBW tS SR + SR - VOS
Gain-Bandwidth Product Settling Time Slew Rate Positive Slew Rate Negative Offset Voltage Match (LT1881/LT1882)
f = 20kHz 0.01%, VOUT = - 5V to 5V, AV = -1, RL = 2k AV = - 1
q
0.21 0.18 0.13 0.1
0.4 0.20 42 125 175 235 70 125 160 1.1 700 900 1000 300 400 500
AV = - 1
q
(Note 5) 0C < TA < 70C - 40C < TA < 85C 0C < TA < 70C - 40C < TA < 85C
q q
V V V V V V V/C pA pA pA pA pA pA dB
Offset Voltage Match (LT1881A)
q q q q q
35
Offset Voltage Match Drift IB+ Noninverting Bias Current Match (LT1881/LT1882) Noninverting Bias Current Match (LT1881A) CMRR Common Mode Rejection Match
(Notes 6, 7) (Notes 7, 8) 0C < TA < 70C - 40C < TA < 85C 0C < TA < 70C - 40C < TA < 85C (Notes 7, 9)
0.4 240
200
q q q
110
125
5
LT1881/LT1882
ELECTRICAL CHARACTERISTICS
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Split supply operation VS = 15V, VCM = 0V unless otherwise noted. (Note 5)
SYMBOL +PSRR -PSRR PARAMETER Positive Power Supply Rejection Match Negative Power Supply Rejection Match CONDITIONS VEE = - 15V, VCM = 0V, 1.5V < VCC < 18V, (Notes 7, 9) VCC = 15V, VCM = 0V, - 1.5V < VEE < - 18V, (Notes 7, 9)
q q
MIN 108 104
TYP 130 130
MAX
UNITS dB dB
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The inputs are protected by internal resistors and back-to-back diodes. If the differential input voltage exceeds 0.7V, the input current should be limited externally to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum. Note 4: The LT1881C, LT1882C, LT1881I and LT1882I are guaranteed functional over the operating temperature range of - 40C to 85C. Note 5: The LT1881C and LT1882C are designed, characterized and expected to meet specified performance from - 40C to 85C but are not tested or QA sampled at these temperatures. The LT1881I and LT1882I are guaranteed to meet specified performance from - 40C to 85C.
Note 6: This parameter is not 100% tested. Note 7: Matching parameters are the difference between amplifiers A and B in the LT1881; and between amplifiers A and D and B and C in the LT1882. Note 8: This parameter is the difference between the two noninverting input bias currents. Note 9: CMRR and PSRR are defined as follows: CMRR and PSRR are measured in V/V on each amplifier. The difference is calculated in V/V and then converted to dB.
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current per Amplifier vs Supply Voltage
1200
SUPPLY CURRENT PER AMPLIFIER (A)
1000 800 600
125C
SLEW RATE (V/s)
25C -55C
0.30 0.25 0.20 0.15 0.10 FALLING
SLEW RATE (V/s)
400 200
0
0
4
8 12 16 20 24 28 32 TOTAL SUPPLY VOLTAGE (V)
6
UW
36
1881/2 G01
Slew Rate vs Supply Voltage
0.45 0.40 0.35 AV = -1 RISING 0.4 0.5
Slew Rate vs Temperature
RISING VS = 15V VS = 5V VS = 15V FALLING 0.2 VS = 5V
0.3
0.1
0.05 0 0 4 8 12 16 20 24 28 32 TOTAL SUPPLY VOLTAGE (V) 36 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
1881/2 G03
1881/2 G02
LT1881/LT1882 TYPICAL PERFOR A CE CHARACTERISTICS
Settling Time vs Output Step
10 8 6
OUTPUT STEP (V)
GAIN BANDWIDTH PRODUCT (kHz)
VS = 15V AV = -1
OUTPUT STEP (V)
4 2 0 -2 -4 -6 -8 -10
0.1%
0.01%
0.1%
0.01%
0 5 10 15 20 25 30 35 40 45 50 55 60 65 SETTLING TIME (s)
1881/2 G04
Phase Margin vs Supply Voltage
60 58 10
PHASE MARGIN (DEG)
-55C 56
GAIN (dB)
54 125C 52 50
125C
GAIN (dB)
48 46 -40 -40
0
4
8 12 16 20 24 28 32 TOTAL SUPPLY VOLTAGE (V)
Gain vs Frequency with CLOAD, AV = 1
10 VS = 15V 0 1500pF 1000pF
GAIN (dB)
GAIN (dB)
-10
-20 0pF -30
-40
1k
10k
100k 1M FREQUENCY (Hz)
UW
1881/2 G07
Settling Time vs Output Step
10 8 6 4 2 0 -2 -4 -6 -8 -10 0 5 10 15 20 25 30 35 40 45 50 55 60 65 SETTLING TIME (s)
1881/2 G05
Gain Bandwidth Product vs Supply Voltage
900
VS = 15V AV = 1
850 125C 800 25C 750 -55C 700 650 600
0.1%
0.01%
0.1%
0.01%
0
4
8 12 16 20 24 28 32 TOTAL SUPPLY VOLTAGE (V)
36
1881/2 G06
Gain vs Frequency, AV = -1
10
Gain vs Frequency, AV = 1
0
0
-10
-10 VS = 2.5V -20 VS = 15V
-20 VS = 2.5V -30 VS = 15V
-30
36
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
1881/2 G08
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
1881/2 G09
Gain vs Frequency with CLOAD, AV = -1
10 VS = 15V 0 1800pF
500pF
-10
1000pF
-20
500pF
-30
0pF
10M
100M
1881/2 G10
-40
1k
10k
100k 1M FREQUENCY (Hz)
10M
100M
1881/2 G11
7
LT1881/LT1882 TYPICAL PERFOR A CE CHARACTERISTICS
Large Signal Response, AV = -1 Large Signal Response, AV = 1 Small Signal Response, AV = -1, No Load
TIME (50s/DIV)
1881/2 G12
TIME (50s/DIV)
VOUT (20mV/DIV)
VOUT (5V/DIV)
VOUT (5V/DIV)
Small Signal Response, AV = -1, CL = 1000pF
VOUT (20mV/DIV)
VOUT (20mV/DIV)
TIME (2s/DIV)
1881/2 G15
TIME (2s/DIV)
VOUT (20mV/DIV)
8
UW
1881/2 G13
TIME (2s/DIV)
1881/2 G14
Small Signal Response, AV = 1, RL = 2k
Small Signal Response, AV = 1, CL = 500pF
1881/2 G16
TIME (2s/DIV)
1881/2 G17
LT1881/LT1882
APPLICATIO S I FOR ATIO
The LT1881 dual and LT1882 quad op amps feature exceptional input precision with rail-to-rail output swing. The amplifiers are similar to the LT1884 and LT1885 devices. The LT1881 and LT1882 offer superior capacitive load driving capabilities over the LT1884 and LT1885 in low voltage gain configurations. Offset voltages are trimmed to less than 50V and input bias currents are less than 200pA on the "A" grade devices. Obtaining beneficial advantage of these precision input characteristics depends upon proper applications circuit design and board layout. Preserving Input Precision Preserving the input voltage accuracy of the LT1881/ LT1882 requires that the applications circuit and PC board layout do not introduce errors comparable to or greater than the 30V offset. Temperature differentials across the input connections can generate thermocouple voltages of 10's of microvolts. PC board layouts should keep connections to the amplifier's input pins close together and away from heat dissipating components. Air currents across the board can also generate temperature differentials. The extremely low input bias currents, 150pA, allow high accuracy to be maintained with high impedance sources and feedback networks. The LT1881/LT1882's low input bias currents are obtained by using a cancellation circuit on-chip. This causes the resulting IBIAS + and IBIAS - to be uncorrelated, as implied by the IOS specification being greater than the IBIAS. The user should not try to balance the input resistances in each input lead, as is commonly recommended with most amplifiers. The impedance at either input should be kept as small as possible to minimize total circuit error.
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PC board layout is important to insure that leakage currents do not corrupt the low IBIAS of the amplifier. In high precision, high impedance circuits, the input pins should be surrounded by a guard ring of PC board interconnect, with the guard driven to the same common mode voltage as the amplifier inputs. Input Common Mode Range The LT1881 and LT1882 outputs are able to swing nearly to each power supply rail, but the input stage is limited to operating between VEE + 0.8V and VCC - 0.9V. Exceeding this common mode range will cause the gain to drop to zero; however, no gain reversal will occur. Input Protection The inverting and noninverting input pins of the LT1881 and LT1882 have limited on-chip protection. ESD protection is provided to prevent damage during handling. The input transistors have voltage clamping and limiting resistors to protect against input differentials up to 10V. Short transients above this level will also be tolerated. If the input pins can see a sustained differential voltage above 10V, external limiting resistors should be used to prevent damage to the amplifier. A 1k resistor in each input lead will provide protection against a 30V differential voltage. Capacitive Loads The LT1881 and LT1882 can drive capacitive loads up to 1000pF in unity-gain. The capacitive load driving increases as the amplifier is used in higher gain configurations. Capacitive load driving may be increased by decoupling the capacitance from the output with a small resistance.
W
U
U
9
LT1881/LT1882
PACKAGE DESCRIPTIO
0.300 - 0.325 (7.620 - 8.255)
0.009 - 0.015 (0.229 - 0.381)
(
+0.035 0.325 -0.015 8.255 +0.889 -0.381
)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
10
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Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400* (10.160) MAX 8 7 6 5
0.255 0.015* (6.477 0.381)
1
2
3
4 0.130 0.005 (3.302 0.127)
0.045 - 0.065 (1.143 - 1.651)
0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 0.003 (0.457 0.076)
N8 1098
0.100 (2.54) BSC
LT1881/LT1882
PACKAGE DESCRIPTIO U
Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 7 6 5
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP
2
3
4
0.053 - 0.069 (1.346 - 1.752)
0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 - 0.050 (0.406 - 1.270)
0.050 (1.270) BSC
SO8 1298
S Package 14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.337 - 0.344* (8.560 - 8.738) 14 13 12 11 10 9 8
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0 - 8 TYP
2
3
4
5
6
7
0.053 - 0.069 (1.346 - 1.752)
0.004 - 0.010 (0.101 - 0.254)
0.016 - 0.050 (0.406 - 1.270)
0.014 - 0.019 (0.355 - 0.483) TYP
0.050 (1.270) BSC
S14 1298
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
11
LT1881/LT1882
TYPICAL APPLICATIO
-
10k 0.1% 10k 0.1% A1 1/2 LT1881
+
RELATED PARTS
PART NUMBER LT1112/LT1114 LT1677 LT1793 LT1884/LT1885 LTC2050 DESCRIPTION Dual/Quad Picoamp Input Op Amp Gain Programmable Instrumentation Amp Low Noise JFET Op Amp Dual/Quad Picoamp Input Op Amp Zero Drift Op Amp in SOT-23 COMMENTS VOS = 60V Max Gain Error = 0.08% Max IB = 10pA Max 3 Times Faster than LT1881/LT1882 VOS = 3V Max, Rail-to-Rail Output
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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-50C to 600C Digital Thermometer Operates on 3.3V
VCC = 3.3V RF 1k R1 4k R2 4k VCC
-
RT VCC R3 1k
A2 1/2 LT1881
VREF +IN -IN GND LTC1287
VCC CLK DOUT 1F
+
V V = CC + 1.588mV/C 2
CS/SHDN
RT: OMEGA F4132 1000 RTD R1, R2, R3, RF: USE BI 698-3 2k x 8 RESISTOR NETWORK
1881/2 TA02
18812i LT/TP 0400 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 2000

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